In bus application circuits a common problem exists called the "wired OR phenomena". This phenomena may become evident when a plurality of pull-down transistors 10a-10i are configured in parallel with each other as seen in FIG. 1. When one or more transistors 10a-i stop conducting, the remainder of the transistors in the parallel path must conduct the total current. During the brief period of time when the current is being redistributed through the remaining conducting transistors, the node voltage, V.sub.0, may glitch high. The magnitude of the glitch is proportional to the percentage of pull-down transistors 10a-i that discontinue conduction.
After redistribution of current in remaining conducting pulldown transistors 10a-i, the positive edge glitch goes away and the proper node voltage, V.sub.0, is established. The "wired OR" phenomena may cause an error in logic operation if, during sampling, the glitch causes internal logic to change states.
Checking for "wired OR" type glitches often requires clocks with frequencies as high as several hundred megahertz to assure that all glitches are identified and eliminated. Providing a high frequency clock requires another clock circuit to be designed and built thus increasing die area on a semiconductor chip or requires another discrete clock (such as a crystal oscillator) to be put on the circuit board which increases system cost and increases board complexity. Further, the existence of a high frequency clock has detrimental effects on performance of the semiconductor chip by increasing the chip's power dissipation. In CMOS integrated circuits (which are overwhelmingly used in digital integrated circuit applications) power dissipation is directly proportional to frequency of operation. Therefore, the high frequency circuitry, whether internal or external to the semiconductor die, increases the chip power dissipation which often is a critical design constraint and therefore unacceptable.
It is an object of this invention to provide a digital glitch filter that identifies and eliminates high frequency glitches without the addition of a high frequency sampling clock.
It is another object of this invention to provide a programmable glitch filter so that a user may manually dictate the specific duration of the sampling window desired to filter glitches.
Other objects and advantages of the invention will become apparent to those of ordinary skill in the art having reference to the following specification together with the drawings herein.